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ADAU1373BCBZ-R7 Datasheet(PDF) 153 Page - Analog Devices

Part # ADAU1373BCBZ-R7
Description  Low Power Codec with Speaker and Headphone Amplifier
PDF  296 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADAU1373BCBZ-R7 Datasheet(HTML) 153 Page - Analog Devices

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ADAU1373
Rev. 0 | Page 153 of 296
DAIA REGISTER
Address: 0x44, Reset: 0x0A, Name: DAIA
Digital Audio Interface A Settings 1
Table 97. Bit Descriptions for DAIA
Bits
Bit Name
Settings
Description
Reset
Access
7
BCLKINVA
BCLK Inversion Control. Bit clock polarity inversion setting.
0x0
RW
0
BCLK not inverted (default)
1
BCLK inverted
6
MSA
Master Mode Enable. Digital Audio Interface A master/slave setting.
0x0
RW
0
Enable slave mode (default)
1
Enable master mode
5
SWAPA
Swap Audio Interface Data Control. Left/right channel data swap setting.
0x0
RW
0
Output left- and right-channel data as normal (default)
1
Swap left- and right-channel DAC data in audio interface
4
LRPA
Polarity Control for Clocks in Right-Justified, Left-Justified, and I2S Modes.
Polarity invert setting for frame clock.
0x0
RW
0
Normal DACLRC and ADCLRC (default)
1
Invert DACLRC and ADCLRC polarity
[3:2]
WLA
Data-Word Length Control. Digital Audio Interface A data-word length
setting: 16/20/24/32 bits.
0x2
RW
00
16 bits
01
20 bits
10
24 bits (default)
11
32 bits
[1:0]
FORMATA
Digital Audio Interface A Format Control. Digital Audio Interface A serial
format setting RJ/LJ/I2S/DSP mode.
0x2
RW
00
Right justified
01
Left justified
10
I2S format (default)
11
DSP mode



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