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ADAU1373BCBZ-R7 Datasheet(PDF) 146 Page - Analog Devices |
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ADAU1373BCBZ-R7 Datasheet(HTML) 146 Page - Analog Devices |
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146 / 296 page ![]() ADAU1373 Rev. 0 | Page 146 of 296 ADC_SETTING REGISTER Address: 0x3C, Reset: 0x00, Name: ADC_SETTING Table 92. Bit Descriptions for ADC_SETTING Bits Bit Name Settings Description Reset Access [7:3] RESERVED 0x00 RW 2 ADC_RESET_FORCE 0x0 RW 0 ADC reset force disable (default) 1 ADC reset force enable 1 ADC_RESET 0x0 RW 0 No reset (default) 1 Reset 0 PDETECT 0x0 RW 0 Peak detection disable (default) 1 Peak detection enable |
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