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ADAU1373BCBZ-R7 Datasheet(PDF) 233 Page - Analog Devices |
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ADAU1373BCBZ-R7 Datasheet(HTML) 233 Page - Analog Devices |
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233 / 296 page  ADAU1373 Rev. 0 | Page 233 of 296 MDRC_PRE_FILTER REGISTER Address: 0xB0, Reset: 0x00, Name: MDRC_PRE_FILTER MDRC Low-Pass and High-Pass Filter Setting Table 199. Bit Descriptions for MDRC_PRE_FILTER Bits Bit Name Settings Description Reset Access [7:6] RESERVED Reserved. 0x0 RW [5:2] MDRC_HPF MDRC High-Pass Filter Cutoff Frequency. 0x0 RW 0000 50 Hz 0001 100 Hz xxxx 50 Hz step size 1111 800 Hz [1:0] MDRC_LPF MDRC Low-Pass Filter Cutoff Frequency. 0x0 RW 00 4 kHz 01 8 kHz 10 20 kHz MDRC_SPL_CTRL (SPLITTER FREQUENCIES) REGISTER Address: 0xB1, Reset: 0x00, Name: MDRC_SPL_CTRL MDRC Band Splitting Crossover Frequency Setting Table 200. Bit Descriptions for MDRC_SPL_CTRL Bits Bit Name Settings Description Reset Access [7:4] MDRC_CROSS_HIGH MDRC Crossover Filter High Band Frequency. 0x0 RW 0000 1 kHz 0001 2 kHz xxxx 1 kHz step size 1111 16 kHz [3:0] MDRC_CROSS_LOW MDRC Crossover Filter Low Band Frequency. 0x0 RW 0000 100 Hz 0001 200 Hz xxxx 100 Hz step size 1111 1.6 kHz |
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