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ADAU1373BCBZ-R7 Datasheet(PDF) 234 Page - Analog Devices |
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ADAU1373BCBZ-R7 Datasheet(HTML) 234 Page - Analog Devices |
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234 / 296 page ![]() ADAU1373 Rev. 0 | Page 234 of 296 MDRC_CTRL REGISTER Address: 0xB2, Reset: 0x00, Name: MDRC_CTRL MDRC Enable Setting Table 201. Bit Descriptions for MDRC_CTRL Bits Bit Name Settings Description Reset Access [7:3] RESERVED Reserved 0x00 RW 2 MDRC_LPFEN MDRC Low-Pass Filter Enable. 0x0 RW 0 Disable 1 Enable 1 MDRC_HPFEN MDRC High-Pass Filter Enable. 0x0 RW 0 Disable 1 Enable 0 MDRC_EN MDRC Enable. 0x0 RW 0 Disable 1 Enable PRE_HPF1_COEFH (MSB) REGISTER Address: 0xB3, Reset: 0xFF, Name: PRE_HPF1_COEFH High-Pass Filter 1 Coefficient MSB Table 202. Bit Descriptions for PRE_HPF1_COEFH Bits Bit Name Settings Description Reset Access [7:0] PRE_HPF1_COEFH Pre-HPF1 Coefficient[10:3]. 0xFF RW |
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